Highly reliable thin dielectric layers are required for the fabrication of advanced semiconductor devices. This is especially true for the fabrication of advanced non-volatile memory devices, such as EPROMs, EEPROMs, and flash memories. In order to meet speed and density requirements these advanced memory devices require tunnel oxides with thicknesses of less than 120 angstroms. Moreover, the tunnel oxide in these devices must be able to withstand repeated program/erase cycles (&gt;10.sup.6) which subject the tunnel oxide to high-field stress (&gt;8 MV/cm). The reliability of these advanced memory devices, however, is degraded when the tunnel oxide is scaled to thicknesses below 120 angstroms. The high-field stress applied to the device's thin tunnel oxide, over repeated program/erase cycles, causes the tunnel oxide to become leaky, and this adversely effects the device's data retention time as well as its endurance (i.e., the number of times the device can be programmed and erased). Thus, the fabrication of advanced non-volatile memories is limited by these reliability issues. Accordingly, a need exists for a highly reliable thin dielectric layer that can be used to fabricate advanced semiconductor devices, such advanced non-volatile memory devices.